deployed_

ASIC Verification EEJ 2026

Bosch Group - bengaluru, in

Still listed by Bosch Group · checked today · posted 27 Oct 2026 (yesterday)

India: good overlapOnsiteSeniorFull-timeEngineeringOther engineering

Skills: Asic verification, SOC, Pcie, Lpddr, Emmc, UFS, Lvds, Mipi, Uart, SPI, I2C, CAN, LIN, Ethernet, Ibm doors, Codebeamer, Lauterbach trace32, Jtag, Openocd, Python, DSO, Logic analyzer, Adas, Nxp s32g, Qualcomm, Renesas r-car

Key ResponsibilitiesExecution & Design Ownership

  • SoC Requirements Engineering: Contribute to and manage HW SoC-level requirement mapping, traceability matrices, and technical analysis.
  • Hardware Design & Documentation: Develop and maintain Hardware Design Documentation (HDD), block diagrams, and system architecture specifications.
  • Schematic & Layout Contribution: Contribute to the HW module design with schematic and layout inputs (including impedance profiles, stack-up constraints, and SI/PI mitigation strategies).
  • Bring-Up & Validation: Lead the creation, optimization, and execution of the "Bring-Up and Validation Plan" for project samples. Execution of the validation plan and identifying findings.
  • Debugging & Root-Cause Analysis (RCA): Lead systematic debugging approach and present RCA findings and workarounds to stakeholders.
  • Hardware Automation & Efficiency: Develop Python scripts to automate bench measurements, parse register maps, control lab instruments.
  • **Domain knowledge: **ADAS, IVI, Central & Zonal Gateways with NXP (S32G, S32N), Qualcomm, Renesas R-CAR SoCs

Project & Technical Leadership

  • Planning & Estimation: Contribute to project planning by defining engineering milestones, identifying technical risks, and providing effort estimations.
  • Mentoring: Mentor and guide team on hardware, bring-up, and validation. Assist in breaking down system-level goals into clear technical tasks and coordination.
  • Risk & Errata Mitigation: Proactively identify project risks. Analyze silicon vendor errata sheets to engineer and implement robust workarounds.
  • Competency Building: Help assess team technical capabilities, lead knowledge-sharing sessions, and actively mentor junior engineers.

SkillsRequirements & Test Management (RM) Tools

  • Experience in IBM Rational DOORS, DNG) or PTC Codebeamer.
  • Experience using IBM Engineering Test Management (ETM) for verification test suites.

Interfaces & Protocols

  • High-Speed: PCIe, LPDDRx, eMMC, UFS, and LVDS/MIPI.
  • Automotive Networks: UART, SPI, I2C, CAN/FD, LIN, and Ethernet.

Debugging, Automation & Lab Instrumentation

  • Diagnostic Tools:Lauterbach Trace32, JTAG, and OpenOCD.
  • Automation: Proficiency in Python for test scripting and automation.
  • Lab Instrumentation: DSOs, logic analyzers, and protocol analyzers

Preferred Qualifications

  • Experience: 6+ years of experience in embedded hardware engineering, with demonstrated experience in technical leadership or mentorship capacity.
  • Education: Bachelor's or Master's degree in Electrical/Electronics Engineering.

BE / B.Tech / ME / M.Tech (Electronics and Communication)

5

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ASIC Verification EEJ 2026 at Bosch Group | deployed